1. The triggering of maskable interrupts can be stopped in some time-critical functions. 2. Hardware interrupts are divided into maskable interrupts and non-maskable interrupts ( NMI ). 3. Hardware interrupts are divided into maskable interrupts and non-maskable interrupts ( NMI ). 4. There is only one maskable interrupt . 5. It provided only floppy disk and Centronics parallel interfaces, plus a non-maskable interrupt button. 6. A common use of a hybrid interrupt is for the NMI ( non-maskable interrupt ) input. 7. The hardware used the Non Maskable Interrupt ( NMI ) to take control back to the emulation code. 8. IF does not affect the handling of non-maskable interrupts or software interrupts generated by the INT instruction. 9. One unassigned line of the S-100 bus then was reassigned to support the non-maskable interrupt request. 10. Any value written to NMIRES resets the bits in NMIST which indicate the reason for the most recent Non-Maskable Interrupt .
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